Fujitsu Standardizes on Synopsys' PrimeTime Delay Calculator in Its ASIC Design Flow
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Jan. 8, 2003--
PrimeTime's Delay Calculator Delivers SPICE-Comparable Accuracy
for 0.13 Micron Designs and Below
Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex
integrated circuit (IC) design, today announced that Fujitsu has
standardized on PrimeTime(R) as the delay calculator in its 130 and 90
nanometer application-specific IC (ASIC) design flow. The PrimeTime
delay calculator delivers SPICE-comparable accuracy and integrates
seamlessly with Fujitsu's PrimeTime-based flow for static timing
verification. By extending its use of PrimeTime to include the delay
calculator, Fujitsu deploys an accurate and integrated static timing
solution that speeds timing closure in its digital design flow.
"Fujitsu is developing accurate and proven flows that support the
most complex ASIC designs," said Kazuyuki Kawauchi, general manager of
the Technology Development Division at Fujitsu Limited. "In our
extensive evaluation of the PrimeTime delay calculator, we discovered
that it achieves accuracy within five percent of SPICE for our
advanced 130 and 90 nanometer technologies. Therefore, we have
extended our PrimeTime static timing analysis flow to include its
delay calculator, which greatly streamlines timing verification of our
complex ASIC designs."
Built into Synopsys' PrimeTime and PrimeTime(R) SI, the PrimeTime
delay calculator provides accurate cell and interconnect delay
information that is required to achieve signoff-quality static timing
analysis (STA) and accurate signal integrity analysis while
eliminating cumbersome interfaces and inconsistencies between tools.
This technology is the foundation for static crosstalk analysis in
PrimeTime SI, enabling designers to accurately pinpoint
crosstalk-induced timing failures on multimillion-gate designs, which
translates to increased designer productivity and higher design
accuracy.
"As our customers move to 130 nanometer technologies and below,
they need a highly accurate solution for timing sign-off," said Bijan
Kiani, vice president of marketing, Synopsys' Nanometer and Analysis
Test business unit. "PrimeTime's rapid rate of adoption as the golden
delay calculator in leading ASIC vendor flows underscores Synopsys'
technology leadership in gate-level delay calculation, static timing,
and signal integrity analysis."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS), headquartered in Mountain View,
Calif., creates leading EDA tools for the global electronics market.
The company delivers advanced design technologies and solutions to
developers of complex integrated circuits, electronic systems and
systems on a chip. Synopsys also provides consulting and support
services to simplify the overall IC design process and accelerate time
to market for its customers. Visit Synopsys at
http://www.synopsys.com.
Synopsys, the Synopsys logo and PrimeTime are registered
trademarks of Synopsys, Inc. All other trademarks or registered
trademarks mentioned in this release are the intellectual property of
their respective owners.
CONTACT: Synopsys, Inc.
Nancy Renzullo, 650/584-1669
renzullo@synopsys.com
or
Edelman
Sarah Seifert, 650/429-2776
sarah.seifert@edelman.com
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